Frequency shift relaying apparatus



May 6, "1969 c. r. ALrr-'ATHER FREQUENCY SHIFT RELAYING APPARATUS SheetFiled May 6, 1966 INVENTOR Conrad T. Altfather TToRN Y May 6, 1969 0.1'.ALTFATHER FREQUENCY SHIFT RELAYING APPARATUS Sheerl Filed May 6 0 000 00 0 0 0 0000+ 0 0 0m 0 0 0 0 0 ++00+ 0 0 0 +\00000.r+++++ v 0 0 0 0 N0.0 0 ++++0 0 0 0 0 0 0 0 0 0 ++00+ 0 0 0 Nm 0 000 0 0 0 0 0 0 0 0 0 000 00 0 S m. m 0 ,m 0 09900 0 0 m. 0 msc. Snmmwf E. dzwwro E m0 It; 2.5mmmm2 $200 2.3mm.

United States Patent Office 3,443,159 Patented May 6, 1969 FREQUENCYSHIFT RELAYING APPARATUS Conrad T. Altfather, Basking Ridge, NJ.,assignor to Westinghouse Electric Corporation, Pittsburgh, Pa., a

corporation of Pennsylvania Filed May 6, 1966, Ser. No. 548,164 Int. Cl.H02h 3/38 U.S. Cl. 317-36 This application relates generally to relayingapparatus and more particularly to relaying apparatus actuated inresponse to a shift in the output frequency of a remotely locatedtransmitter.

In the application of frequency-shift carrier to the control ofprotective relaying apparatus, it has been customary to employ tworelays, one energized when guard frequency is being transmitted and theother energized when trip frequency is being transmitted. The breakertrip coil in such apparatus is connected in series with a normallyopencontact of the trip relay `and normally-closed contact of the guardrelay so that the breaker will not be tripped until the guard frequencyis absent and the trip frequency is present. Additionally, a time delaymay be introduced between the drop-out of the guard relay and the pickupof the trip relay in order to reduce the possibility of incorrecttripping due to spurious frequencies in a noise burst. To furthermini-mize the possibility of incorrect tripping due to noise, anintermediate frequency filter with a narrow pass band and steep skirtsmay be used in the receiver. To reduce the intensity of the noisegenerated frequencies on the trip side of the receiver output, theintermediate frequency filter response is adjusted to have its peakresponse on the guard side of the channel. However, this involvescritical adjustments that are sensitive to frequency drift in thecrystals and the filter response and incorrect performance may result.

This invention is directed to` circuitry by which the guard relay andthe narrow intermediate lter are eliminated. Tripping for a true faultcondition is accomplished more reliably and with minimum delay andgreater security against incorrect tripping by transient conditions.Furthermore, lsolid state components are used throughout the logiccircuitry.

An object of this invention is to provide a positively operatedapparatus actuated by a frequency shift of the input signal.

A further object of this invention is to provide such an apparatus whichis not affected by a noise.

Another object of this invention is to provide a positive actuated alarmsignal for indicating the loss of the transmitted signal.

Another object is to provide an apparatus for preventing false trippingas a consequence of a Iprolonged severe noise.

Another object of this invention is to provide means for resetting atime delay apparatus in the event that the noise frequency shiftsmomentarily into the guard range.

Other objects of the invention will appear from the appended claims, thedescription and the drawings, in which:

FIGURE 1 is a block-diagram representation of a frequency shift actuatedrelaying apparatus embodying the invention;

FIG. 2 is a similar view showing the schematic circuitry which may beused in carrying out the invention; and,

FIG. 3 is a tabulation helpful in the understanding of the invention.

Referring to the drawings by characters of reference, the numeral 1indicates generally a receiver-discriminator having an input 2 and aIpair of output terminals 4 and 6. An input signal is applied betweenthe input terminal 11 Claims 2 and ground and the output guard signalwill appear between the output terminal 4 and ground w-hile'the tripoutput signal will appear between the o utput terminal l6 and ground.Normally, the signal supplied to the receiver dlscriminator 1 will -beof such a frequency that the receiver discriminator will maintain theguard output terminal 4 energized and the trip output terminal 6deenergized whereby an alarm 8 and a trip relay 10 will remain in theirdeenergized conditions.

The trip relay 10 is designed to be operated only in response to acondition in which guard output energization is eliminated and tripoutput energization is applied substantially immediate-ly and whenthetrip output energization is maintained for a predetermined timeinterval. The alarm 8 is arranged to be energized to sound an alarmsolely after both of the output terminals 4 and 6 have been deenergizedfor a predetermined time period to ndicate along =both the guard andtrip signals or loss of channel.

More specifically, an alarm timer interrupting timer 12 has its inputconnection 14 connected to guard output bus 16 which is connected to andenergized by the output terminal 4. The timer output 18 is connected toone input terminal 20 of a NOR network 22. A second input terminal 24 ofthe NOR network 22 is connected by means of a bus 26 to a trip outputbus 28 which bus is Iin t-urn connected to and energized by the outputterminal 6 of the receiver-discriminator 1.

The output terminal 30 of the NOR network 22 is connected to the inputterminal 32 of a second or alarm timer 34 which has its output terminal36 connected to input terminal 38 of a NOT network 40. The outputterminal 42 of the NOT network is connected to a first input terminal 44of an AND network 46 and to input terminal 48 of a NOT network 50. Theoutput terminal 52 of the NOT network is connected to input terminal 54of a second NOT network 56 which has its output terminal 58 connected toinput terminal 60 of the alarm 8. The bus 26, in addition to beingconnected to the input terminal 24 of the NOR network 22, is connectedto the output terminal 42 of the NOT network 40. A third or trip timer62 has its input terminal 64 connected to output terminal l66 of a NOTnetwork 68, the input terminal 70 of which is connected to the -guardbus 16. The output terminal 72 of the timer 62 is connected to thesecond input terminal 74 of the AND network 46.

A fourth or noise timer 76 has its input terminal 78 connected to outputterminal 80 of a NOR network 82. The NOR network 82 is provided with afirst input terminal 84 which is connected to the guard bus 16 and asecond input terminal 86 which is connected to the trip bus 28. Theoutput terminal 88 of the timer 76 is connected to a rst input terminal90 of a NOR network 92, the output terminal 94 of which is connected tothe third input terminal 96 of the AND network 46. The second inputterminal 98 of the NOR network 92 is connected to the output terminal100 of a NOT network 102, the input terminal 104 of which is connectedto the trip output bus 28.

Typical examples of the time delays imposed by the timers areillustrated in FIG. l and lare as follows: the interrupting timer 12 hasa l5 millisecond timing interval; the alarm timer 34 has a 150millisecond timing interval; the trip timer 62 has a 2 to 2O millisecondtiming interval; and the timer 76 has a 5 millisecond timing interval.The actual time of the timer 76 will depend upon the noisecharacteristics of the network and 5 milliseconds has been chosen forexplanations. For purposes of the tabulation of FIG. 3, it has beenassumed that the trip timer 62 s adjusted to provide a 10 millisecondtiming interval.

Referring more specifically to FIG. 2, it will be observed that theinterrupting timer 12 includes a transistor 106 having its baseconnected to its input terminal 14 and its emitter connected through aresistor 108 to the input terminal 14. The collector of the transistor106 is connected through a resistor 110 to a grounded terminal 112 towhich one terminal of a capacitor 114 is connected. The'other terminalof the capacitor 114 is connected to the emitter of the transistor 106and to one terminal of a Zener diode 116 which has its other terminalconnected to the output terminal 18. When the guard bus 16 is energized,the base of the transistor 106 can never become negative with respect tothe emitter and the transistor 106 is held blocked. Under theseconditions, charging current for capacitor 114 will flow from the inputterminal 14 through resistor 108 to the ground terminal 112. Thecharging of the capacitor 114 will be at a rate determined by themagnitude of the resistor 108. The time interval for charging thecapacitor 114 to the breakover voltage of the Zener diode 116 may be, asindicated above, 15 milliseconds.

When the guard bus 16 becomes deenergized, base current liows throughresistor 118 and the transistor 106 becomes conducting. The resistor 110is of a relatively low value whereby the capacitor 114 rapidlydischarges through the emitter collector circuit of the transistor 106.This insures that the capacitor 114 becomes substantially completelydischarged each time the guard bus 16 is deenergized.`

The alarm timer 34 is provided with a positive potential input terminal120 which is connected to the timer input terminal 32 through a resistor122. This terminal 32 is connected through terminal 30 to the collectorof `a transistor 124 (in the NOR network 22) which `has its emitterconnected to a grounded terminal 126 whereby the terminals 30 and 32 aremaintained substantially at ground potential during the conductiveintervals of the transistor 124. The base of the transistor 124 isconnected to the first input terminal 20 of the NOR circuit 22 andthrough a diode 128 to the second input terminal 24. It will beappreciated that Whenever the terminal 24 or terminal 20 is energized,-base current will ilow through the transistor 124 to maintain itconductive and the potential of the timer terminal 32 will be heldsubstantially at ground potential. The input terminal 32 is connectedthrough a resistor 130 to one terminal 132 of a capacitor 134, the otherterminal of which is connected to a grounded terminal 136. The capacitorterminal 132 is connected through a Zener diode 138 to output terminal36I of the timer 34.

It will be `appreciated that when the terminal 32 of the timer 34 ismaintained at ground potential, no charging current can llow through theresistor 130 to charge the capacitor 134 and any charge in the capacitor134 at the time that the terminal 132 is brought to ground potentialwill discharge through the resistor 130 and the transistor 124. When,however, the transistor 124 is rendered non-conducting charging currentfor the capacitor 134 will ilow through the resistors 122 and 130 at arate determined primarily by the magnitude of the resistance of theresistor 122. At the end of a predetermined timing interval, which assuggested above may be 150 milliseconds.J the potential of the terminal132 of the capacitor 134 will be raised to such a potential that theZener diode 138 will breakover and raise the potential of the outputterminal 36 of the timer.

The NOT circuit 40 comprises a transistor 140 having its base connectedto its input terminal 38 and its emitter connected to a groundedterminal 142. The NOT circuit is further provided with a potentialsupplying terminal 144 which is connected through a resistor 146 to theoutput terminal 42 and to the collector of the transistor 140. When thepotential of the input terminal 38 of the NOT network 40 is raised aboveground, base current ows through the transistor 140 which will thenconduct and maintain the potential of the output terminal 42 at groundpotential. When, however, no input potential is supplied to the inputterminal 38 the transistor 140 will become non-conducting and thepotential of the output terminal 42 will be raised due to the connectionthereof to the positive potential input terminal through the resistor146.

The alarm 8 can take any desired form such as -a visual or audio deviceconnected between a grounded terminal 148 and its input terminal 60. Theinput terminal 60 is connected through normally closed contacts 150 of arelay 152 to a positive potential input terminal 154. The winding of therelay 152 is connected between the positive potential input terminal 154and the output terminal 54. This output terminal 54 is connected throughinput terminal `52 of NOT network 50 and the collector and emitter of atransistor 156 to a grounded terminal 158. The base of the transistor156 is connected through a resistor 160 to input terminal 48 of the NOTnetwork 50.

The AND network 46 comprises three diodes having their anodes connectedtogether to an output terminal 164 and their cathodes connectedindividually to the three input terminals 44. 74 and 96. The outputterminal 164 is connected to input terminal 166 of the trip relay 10.

The trip relay 10 includes a positive potential input terminal 168 whichis connected through a iirst resistor 170 to the input terminal 166 anda second resistor 172, the winding of a relay 174, the collector emittercircuit of a transistor 176 to a grounded terminal 178. The base of thetransistor 176 is connected through a resistor 180 to the groundedterminal 178 and through a diode 182 to the input terminal 166. Theimpedance to forward current flow through the diode 182 is sufficient sothat insutiicient base current will flow through the transistor 176 ifany one of the input terminals 44, 74 and 96 are connected to ground aswill be set forth below. Unless current flows through the diode 182, thetransistor 176 will remain non-conducting and the relay 174 will remaindeenergized to maintain its normally open contacts 184 open.

The third or trip timer 62 has its input terminal 64 connected to outputterminal 66 of NOT network 68. When the transistor 1'86 conducts itconnects the terminals 64 and 66 to ground through a grounded terminal188. The `base of the transistor 186 is connected through a currentlimiting resistor to the guard bus 16 through the input terminal 70. Thetimer 62 is provided with a positive potential input terminal which isconnected through a resistor 192, the input terminal 64, a variableresistor 194 and a fixed resistor 196 to one terminal 198 of a capacitor200 having its other terminal connected to a grounded terminal 202. Thecapacitor 200 may discharge through a circuit provided by the resistor204 and diode 206 which are connected in shunt with the timing resistors194 and 196.

The capacitor terminal 198 is connected through a Zener diode 208 to thebase of a transistor 210 the emitter of which is connected to a groundedterminal 212 and the collector of which is connected to the 'base of asecond transistor 214 through a current limiting resistor and to apositive potential input terminal 216 through a voltage droppingresistor 218. The terminal 216 is connected through a resistor 220 tothe collector of the transistor 214 and to the output terminal 72. Theemitter of the transistor 214 is connected to the grounded terminal 212.

fIt will be appreciated that upon interruption of current flow throughthe transistor 186 of the NOT network 68, the input terminal 64 of thetrip timer 62 will be disconnected from the grounded terminal y188 andcharging current will flow to the capacitor 200 from the positivepotential terminal 190 through the resistors 192, 194 and 196. At theend of a predetermined timing interval, the potential of the capacitorterminal 198 will be elevated sufficiently to cause the Zener diode 208to breakover and supply base current t-o the transistor 210 whichthereupon conducts to remove the base drive current from the transistor214. This drive current previously Iflowed from the positive potentialinput terminal 21'6 through resistor 218, a current limiting resistor,and from base to emitter of the transistor 21'4 to grounded terminal212. IWhen transistor 214 becomes non-conducting, the potential of theoutput terminal 72 of the timer is elevated to apply a blockingpotential to the diode of the AND circui-t connected to its second inputterminal 74.

The third input terminal 96 of the AND network 46 is controlled by meansof a network which comprises the NOR networks 82 and 92, the NOT networkI102 and the noise timer 76. The noise timer "76 comprises a capacitor222 shunt connected with a resistor 224. One common terminal of thecapacitor 222 and resistor 224 is connected to a grounded terminal 26and the other common terminal is connected to the input termin-al 7-8through a diode 234 and connected to the output terminal `88 through adiode 228 and a resistor 230.

The timer 76 is controlled by the conductive condition of a transistor232 of the NOR network 82. For this purpose, the collector of thetransistor 232 is connected through output terminal *80 to the inputterminal 78 of the timer 76. The transistor 2'32 has its emitterconnected to a grounded terminal 236 and its base connected throughresistors 238 and 240 to the iirst and second inputs terminal v84 and86. The collector of transistor 232 is connected through a resistor 242to a positive potenti-al input terminal 244.

The NOR network 92 comprises a transistor 246 which has its baseconnected directly to the first input terminal 90 and through a resistor248 to its second input terminal 98. The NOR network 92 further includesa positive potential input terminal 250 which is connected through aresistor 252 and output terminal 9'4 to the collector of the transistor246. The emitter of the transistor 246 is connected to a groundedterminal 245.

The potenti-al of the second input terminal 918 is controlled as aconsequence of the conductive condition of a transistor 2'56 of the NOTnetwork 102. The base of the transistor 256 is connected through acurrent limiting resistor 258 and the NOT input terminal l104 to thetrip bus 28. The emitter of the transistor 256 is connected to agrounded terminal 260 while the collector of the transistor 256 isconnected through the output terminal 100 and a voltage droppingresistor 2162 to a positive potential input terminal 264.

A reference to FIG. 3 will indica-te that the alarm 8 is energized onlywhen the alarm timer 34 has timed out. The trip relay 10 may beenergized solely upon the timing out of the trip timer l62 provided;however, that this time out occurs in response to the termination of theenergization of the guard bus 16 followed yby the energization of thetrip bus 28.

It is believed that any remaining details of construction may best beunderstood by `description of the operation which is as follows: Undernormal conditions a remote signal source energizes thereceiver-discriminator 1 with a signal such that the output terminal 4 senergized and the loutput terminal -6 is deenergized. Upon initialenergizati-on of the guard bus 16, the input terminal 14 of timer 12 isenergized thereby terminating conduction lof the transistor 106 andinitiating or timing interval of the timer. The capacitor 114 charges ata rate as determined by the magnitude of the re-sistance of the resistory108 an-d at the end of a predetermined time interval (in this instanceassumed to be l5 milliseconds), the Zener diode breaks over andenergizes output terminal 1'8. The base drive thereby provided for thetransistor 124 of the -NOR network 22 causes the transistor 124 toc-onduct and ydischarge the capacitor 134 of the second or alarm timer34. This removes any output potential which might have existed at itsoutput terminal 36.

When no potential is present at the output terminal 36, the transistor140 of the NOT network 40 becomes non-conducting and the potential ofits output terminal l42 is raised to provide a blocking potential at thefirst i-nput terminal 44 of the AND network 46. The increase inpotential of the output terminal 42 also is applied to the inputterminal 48 of the NOVI` network 50 which renders transistor 156conducting to energize the winding of the relay 1:52 which thereuponopens its normally closed contacts 150 to interrupt any energization ofthe alarm 8.

Energization of the guard .bus 1-6 also energizes the input terminal 70of the NOT network 68 whereby its transistor 186 conducts and groundsits output terminal 66. This results in the discharge of the capacitor200 of the trip timer 62 and to insure that the transistor 2'10 is heldlblocked. When the transistor 210 is blocked, base current ll-ows in thetransistor 2'14 whereby the potential of the timer output terminal 72maintained at ground potential as indicated by O in FIG. 3. This in turnconnects the second input terminal of the AN'D circuit 74 to groundpotential so that current flowing in the trip relay 10 from the positivepot-ential input terminal through the resistor 170 will flow throughtransistor 214 and not through the transistor 176.

Energization of the guard bus 16 also results in energization of thesecond input terminal 84 of the NOR circuit 82 to cause the transistor232 to conduct and connect its output terminal to ground. This preventsany current ow from the positive potential input terminal 244 to thenoise timer 76 so that the capacitor 222 thereof will dischargeprimarily through resistor 230, the base of the transistor 246 and theinterconnected negative terminals 254 and 226. A lesser amount maydischarge through the timing resistor 224.

Typically, resistor 242 has an ohmic value of 6.8K, resistor 224 has anohmic value of 470K, and resistor 230 has an ohmic value of 82K.Consequently capacitor 222 will be charged to approximately of thesupply voltage if both guard and trip discriminator output are absentfor about 8 milliseconds. After the discriminator regains either guardor trip output, the charge on capacitor 222 will keep transistor 246conductive for approximately 40 to 50 milliseconds. The time dependsupon component tolerances and the gain of the individual transistor,Le., the amount of base current needed to keep it fully conducting.Consequently, the delay introduced by noise timer 76 can vary widely,depending upon how frequently and for how long it forces thediscriminator to have zero output.

When the transmitter is keyed from guard to trip, it is desired that theinterval during which there is no output from the discriminator shouldnot permit sufcient charge to build up on capacitor 222 to keeptransistor 246 conducting for any longer than the minimum delay of thetimer 62. This permits a user who has no appreciable noise problem tokeep his overall trip time to a minimum. The purpose of resistor 224 isto drain off any residual charge on capacitor 222, so that its chargewill have to build up from substantially zero voltage. Resistors 230 and242 primarily control the charge and discharge time of the capacitor222.

At the end of the timing period of the timer 76, its output terminal 88will go to ground potential. At this time, the trip bus 28 is notenergized, the transistor 256 of the NOT circuit will be blocked andbase drive current for the transistor 246 will ow from the positiveterminal of the NOT circuit through resistors 262 and 248 base toemitter in the transistor 246 whereby transistor 246 conducts andmaintains the potential of the third input terminal 96 of the ANDcircuit 46 substantially at ground potential. The maintenance of theterminals 74 and 96 substantially at ground potential is insurance thatthe transistor 176 will not conduct.

In the even of the existence of a fault in a transmission network (notshown) protected by the trip relay 10, a signal will be supplied to theinput terminal 2 of the receiver-discriminator 1 which will cause theoutput terminal 4 to become deenergized and the output terminal 6 tobecome energized. This reversal of energization of the buses 16 and 28occurs a short interval that is much shorter than the timing period ofthe alarm timer 34.

Deenergization of the guard bus 16 results in a substantiallyinstantaneous reduction of the output potential at the output terminal18 of the timer 12. This may cause a short period of blocking of thetransistor 124 and a partial timing of the alarm timer 34. As soon,however as the trip bus 28 is energized, the transistor 124 will againbecome conducting due to base current flow from the trip bus 28 throughdiode 128 to the ground terminal 126. This results in the input terminal32 of the alarm timer 34 being again lowered to ground potential and thedischarge of any charge which may have accumulated on the capacitor 134during the time interval subsequent to the deenergization of the guardbus and the energization of the trip bus. This rendering of the NORcircuit 22 actuated to deenergize its output terminal 30 insures thatthe timer 34 cannot time out and energize the alarm 8. This can only bedone in the absence of deenergization of both the guard bus 16 and thetrip bus 28 and then only when this absence is for the full timingperiod of the alarm timer 34. Under all other operating conditions asfor example the energization of the guard bus, the timer 12 times out toprevent timing out of the timer 34 or the energization of the trip bus28 actuates the NOR circuit 22 to ensure that the timer 34 does not timeout.

Deenergization of the guard bus 16 causes the transistor 186 to becomenon-conducting whereby the input potential of the input terminal 64 ofthe timer 62 is disconnected from ground and the timing capacitor 200 ofthe timer 62 begins to be charged at a rate determined primarily by thesetting of the resistor 194. Assuming that the timing interval of thetimer 62 is set at 10 milliseconds, as indicated in FIG. 3, and that thetrip bus is energized for this millisecond period, the potential of thecapacitor terminal 198 reaches a suicient potential to cause the Zenerdiode 208 to breakover and the transistor 210 to conduct. Conduction ofthe transistor 210 shunts the base drive current for the transistor 214which thereupon ceases to conduct and the potential of the outputterminal 72 of the timer is elevated due to its energization from thepositive potential input terminal 16 through the resistor 220. Thisplaces a positive potential on the second input terminal 74 of the ANDcircuit 46 to back-bias the diode connected thereto.

Energization of the trip bus 28 will re-establish conduction through thetransistor 232 which would otherwise be interrupted due todeenergization of the guard bus 16 whereby the timer 76 will beprevented from increasing the potential of the output terminal 80thereof.

Energization of the trip bus 28 causes base current to ow in thetransistor 256 of the NOT circuit 102 to ground the input terminal 98 ofthe NOR circuit 92. Since at this time there is no input to the NORinput terminal 90 from the timer 76 and no input to the NOR inputterminal 98 from the NOT terminal 100, the transistor 246 of the NORnetwork 92 ceases to conduct. This results in the third input terminal96 of the AND network 46 being positively biased due to its connectionto the positive input terminal 250 through the resistor 252.

As described above when all of the diodes of the AND network 46 arepositively biased, base current from the transistor 176 is no longershunted through the AND network 46 yand instead llows through the diode182 in the base circuit of the transistor 176 which thereupon conductsto establish a circuit extending from the positive potential inputterminal 168 through resistor 172, the energizing winding of the relay184 and transistor 176 to the grounded terminal 178. This current owresults in energization of the relay 174 and closure of its normallyopen contacts 184 which control, through circuitry not illustrated, thetrip mechanism of a circuit breaker or other circuit opening device ofthe network being protected by the relay system.

Under some conditions of operation, however, due to noise or otherfailures of the channel supplying the receiver-discriminator 1, theguard bus 16 as well as the trip bus 28 may :be deenergized. The absenceof the trip signal holds the transistor 256 of the NOT network 68blocked and the potential of the second input terminal 98 of the NORcircuit 92 is elevated sufficiently to insure that the transistor 246will `continue in its `conducting conditions to maintain the potentialof the third input terminal of the AND network 46 substantially atground potential. This prevents any base current flow to the transistor176 and a consequent operation of the trip relay 10.

Immediately upon loss of the guard signal, the transistor 232 of the NORnetwork 82 became non-conducting and elevated the potential of outputterminal of the timer 76. This elevation in the potential of outputterminal 80 caused the capacitor 222 to become fully chargedsubstantially instantaneously to place the timer 76 into its set-to-timecondition.

Under conditions in which both buses 16 and 28 are deenergized the timer34 begins to timeout. At the end of the timing interval of the alarmtimer 34 the timer 34 times out and renders the transistor of the NOTnetwork 40 conducting to terminate base current llow through thetransistor 156 of the NOT network I50 whereby the relay 152 of thenetwork 56 is deenergized and closes its normally closed contacts 150.This closure of the contacts energizes the input terminal 60 and thealarm 8 provides its signal as indicated by the plus mark in FIG. 3.

Should the trip output bus be energized without a subsequentreenergization of the guard bus 16 to reset the alarm timer 34, theconnection of the bus 26 to ground through the diode 162 and transistor140` of the NOT network 40 will prevent any re-establishment of basecurrent flow through the transistor 124 of the NOT circuit 22 and anyresetting of the alarm timer 34. Unless alarm timer 34 is reset, thetransistor 140 of the NOT circuit will continue to conduct and preventany energization of the relay 152 to open the alarm circuit anddiscontinue signal alarm. As indicated in FIG. 3, this condition ofcontinued energization of the alarm will remain.

In the event that the guard signal is retured to the guard bus with orwithout the return of a trip signal, the alarm 8 at the end of the timeout period of the interrupting timer 12 will be deenergized. Such anoperation in which the trip bus 28 is energized as well as the guard bus16 will not be a normal operation for actuation of the trip relay and ifit does occur may occur as for example due to noise on the input circuitto the receiver-discriminator 1. As indicated in FIG. 3 as long as theguard signal is present, the trip timer relay 62 cannot time out. Aslong as the trip timer 62 does not time out, the potential of the secondinput terminal to the AND network 46 cannot be elevated suiciently toblock current ow through the diode connected thereto. This is one of therequisites for establishing base current flow to the trip transistor176.

As indicated in FIG. 3, the sole result of the establishment of guardpotential or the unlikely occurrence of both guard potential and trippotential will be to cause further operation of the alarm at the end ofthe timing interval of the timer 12 but not to cause tripping andoperation of the tripping relay 10 which can only be actuated, afterloss of channel, by a return of the energization of the guard bus 16followed by a deenergization thereof.

In the event of a momentary energization of the guard bus 16, caused asfor example by noise, the noise timer 76 will maintain the transistor246 conducting. In gen- 9 eral effect the noise timer differentiatebetween a false and a true cnergization of the guard bus 16.

Since numerous changes may be made in the above described apparatus anddifferent embodiments of the invention may be made without departingfrom the spirit thereof, it is intended that all matter contained in theforegoing description or shown in the accompanying drawings, shall Ibeinterpreted as illustrative and not in a limiting sense.`

What is claimed and is desired to be secured by United States LettersPatent is as follows:

1. In a relaying network, first and second signal actuated input means,a 'first output means, a plurality of timers, each said timer beingoperable to time out a time interval, a first control networkinterconnecting both of said input means and said first output means andincluding a first and a second of said timers, said first timer having alesser time interval than said second timer, said firrst control networkibeing effective to place said first output means in a first conditionsolely when upon the expiration of said time interval of said secondtimer, said first control network including first circuit meansinterconnecting said first timer to said first input means and to saidsecond timer, said circuit means being responsive to the expiration ofsaid time interval of said first timer for preventing the timing out ofsaid time interval of said second timer, said circuit means beingresponsive to a first energized condition of said first input means toinitiate the timing of said time interval of said first timer, saidnetwork including second circuit means interconnecting said second timerto said second input means, said second circuit means being responsiveto a first energized condition of said second input means to prevent thetiming out of said time interval of said second timer, said firstcontrol network being effective to place said first output means in itssaid first condition solely upon the expiration of a concurrent timeinterval that both of said input means have been removed from their saidfirst conditions, said concurrent interval being at least equal to saidtime interval of said second timer.

2. The combination of claim 1 in which there is provided a second outputmeans, a second control network interconnecting a third of said timersand one of said input means and responsive to the removal of said inputmeans from its said one condition to initiate the timing out of the saidtime interval of said third timer, a third control networkinterconnecting said second and said third timers to said second outputmeans, said third control network being effective to place said secondoutput means in a first condition solely when said third timer has timedout its said time interval and said second timer has not timed out itssaid time interval.

3. The combination of claim 2 in which there is provided a fourthcontrol network, including means connecting a fourth of said timers toboth of said input means, said fourth control network being responsiveto the rendering of a certain of said input means in its said firstcondition to initiate the timing out of said time interval of saidfourth timer, said fourth control network being connected to said thirdcontrol network and including circuit means interconnecting said fourthtimer to said third control network, said third control network beingeffective to place said second output means in its said first conditionsolely when said y third and fourth timers have timed out their saidtime intervals and said second timer has not timed out its said timeinterval.

4. The combination of claim 3 in which said fourth control networkincludes a third circuit means connected in bypass relation with saidfourth timer between one of said input means and said third network,said third circuit means being responsive to the absence of said firstcondition in the one of said input `means to which said third circuitmeans is connected. to maintain said third control network ineffectiveto place said second output means in its said first conditionirrespective of the timing out of said time interval of said fourthtimer.

5. In a relaying network, first and second input means, each of saidmeans having 'a first and a second condition, a plurality of timers,each said timer having a set and a timed out condition and operable totime out a time interval as a consequence of changing from its set toits timed out condition, a first output means, a first control networkconnecting a first of said timers to said first input means and a secondof said timers to said first timer and to said second input means, asecond control network connecting a third of said timers to one of saidinput means, a third control network connecting said second and saidthird timers to said first output means and effective to place saidfirst output means in a first condition solely when said third timer isin its said timed out condition and said second timer has not beenplaced in its said timed out condition.

6. The combination of claim 5 in which said third control network iseffective when said second timer is in its said timed out condition toprevent the placing of said first output means in its said firstcondition irrespective of the condition of said third timer.

7. The combination of claim 6 in which a fourth control network connectsa fourth of said timers Ibetween at least a certain of said input meansand said third control network, said third control network beingeffective to place said first output means in its said first conditionsolely when said third and said fourth timers 'are in their said timedout conditions and said second timer is not in its said timed outcondition.

8. The combination of claim 7 in Iwhich a fifth control network connectssaid input means to said third control network, said fifth controlnetwork being responsive to a said cnodition of the one of said inputmeans to which said fifth control network is connected to prevent saidthird control network from placing said first output means in its saidfirst condition even though said fourth timer is in its said timed outcondition.

9. In a relaying network, a guard input means, a trip input means, atrip output means, a plurality of timers, each said timer having atimed-out condition and a nontimed-out condition including lan initialstate, each said timer being eective to time out a determined timeperiod as it goes from its said initial state to its said timed-outcondition, and AND network having a plurality of input connections andhaving an output connection connected to said trip output means forcontrolling the energized condition thereof, first means connecting afirst of said timers between said guard means land a second of saidtimers, second means connecting said second timer to said trip inputmeans, third means connecting said second timer to a first of said inputconnections of said AND network, fourth means connecting a third of saidtimers between said guard means and a second of said input connectionsof said AND network, a fth means connecting a fourth of said timersbetween at least one of said input means and a third of said inputconnections of said AND network, said first means being effective tocause said first timer to time out its said time period as a consequenceof the presence of la critical potential at said guard input means for atime interval at least equal to said time period of said first timer,said first meansk being effective to actuate said first timer into itssaid initial state `as a consequence of the labsence of said criticalpotential at said guard input means, said first means being effective toprevent the timing out of the timing interval of said second timer whensaid first timer is in its said timed-out condition, said second meansbeing effective to maintain said second timer in its said nontimed-outcondition in the presence of a critical potential at said trip inputmeans, said AND network -being effective to place said trip output meansin a first energized condition solely when a critical signal is presentat all of its said input connections, said third means being ineffectiveto supply to said first input connection of said AND network its saidcritical signal when said second timer is in its said timed-outconditions, said fourth means being effective to prevent the timing outof said third timer when said gurad input means is at its criticalpotential, said fourth means further being effective to supply to saidsecond input connections of said AND network its said critical signalsolely when Said third timer is in its said timed-out condition, saidfifth means being effective to place said fourth timer in its saidinitial state as a consequence of the absence of said critical potentialof the said input means to which it is connected, and said fifth meansfurther being effective to cause said fourth timer to time out its saiddetermined time period as `a consequence of the return of said criticalpotential of the said input means to which said fifth circuit isconnected for a time period not less than said time interval of saidfourth timer.

10. The combination of claim 9 in which said second means is connectedto said third means, said third :means being effective when said secondtimer is in its said timed-out condition to render said second meansineffective to actuate said second timer into its said nontimedoutcondition.

11. The combination of claim 10 in which said first energized conditionof said trip output means actuates a disconnect device, yan alarmdevice, and sixth means connecting said second timer to said alarmdevice, said sixth means being effective solely when said second timeris in its said timed-out condition to actuate said alarm device toprovide an alarm signal.

References Cited UNITED STATES PATENTS 3,117,305 1/1964 Goldberg 340-1713,334,185 8/1967 Marlot 325-323 X 3,353,102 11/1967 Meyers et al325-32() 3,384,822 6/1968 Miyagi 325-30 JOHN F. COUCH, Primary Examiner.

J. D. TRAMMELL, Assistant Examiner.

U.S. Cl. X.R.

1. IN A RELAYING NETWORK, FIRST AND SECOND SIGNAL ACTUATED INPUT MEANS,A FIRST OUTPUT MEANS, A PLURALITY OF TIMERS, EACH SAID TIMER BEINGOPERABLE TO TIME OUT A TIME INTERVAL, A FIRST CONTROL NETWORKINTERCONNECTING BOTH OF SAID INPUT MEANS AND SAID FIRST OUTPUT MEANS ANDINCLUDING A FIRST AND A SECOND OF SAID TIMERS, SAID FIRST TIMER HAVING ALESSER TIME INTERVAL THAN SAID SECOND TIMER, SAID FIRST CONTROL NETWORKBEING EFFECTIVE TO PLACE SAID FIRST OUTPUT MEANS IN A FIRST CONDITIONSOLELY WHEN UPON THE EXPIRATION OF SAID TIME INTERVAL OF SAID SECONDTIMER, SAID FIRST CONTROL NETWORK INCLUDING FIRST CIRCUIT MEANSINTERCONNECTING SAID FIRST TIMER TO SAID FIRST INTPUT MEANS AND TO SAIDSECOND TIMER, SAID CIRCUIT MEANS BEING RESPONSIVE TO THE EXPIRATION OFSAID TIME INTERVAL OF SAID FIRST TIMER FOR PREVENTING THE TIMING OUT OFSAID TIME INTERVAL OF SAID SECOND TIMER, SAID CIRCUIT MEANS BEINGRESPONSIVE TO A FIRST ENERGIZED CONDITION OF SAID FIRST INPUT MEANS TOINITIATE THE TIMING OF SAID TIME INTERVAL OF SAID FIRST TIMER, SAIDNETWORK INCLUDING SECOND CIRCUIT MEANS INTERCONNECTING SAID SECOND TIMERTO SAID SECOND INPUT MEANS, SAID SECOND CIRCUIT MEANS BEING RESPONSIVETO A FIRST ENERGIZED CONDITION OF SAID SECOND INPUT MEANS TO PREVENT THETIMING OUT OF SAID TIME INTERVAL OF SAID SECOND TIMER, SAID FIRSTCONTROL NETWORK BEING EFFECTIVE TO PLACE SAID FIRST OUTPUT MEANS IN ITSSAID FIRST CONDITION SOLELY UPON THE EXPIRATION OF A CONCURRENT TIMEINTERVAL THAT BOTH OF SAID INPUT MEANS HAVE BEEN REMOVED FROM THEIR SAIDFIRST CONDITIONS, SAID CONCURRENT INTERVAL BEING AT LEAST EQUAL TO SAIDTIME INTERVAL OF SAID SECOND TIMER.